Semiconductor devices are typically tested at the wafer level to evaluate their functionality. The process in which devices in a wafer are tested is commonly referred to as “wafer sort.” Wafer testing and sorting typically involves the use of probing technology wherein a probe engages the bond pads on a die under test so as to connect the pads to a testing apparatus. FIGS. 1A and 1B illustrate a conventional testing configuration 100 for wafer (i.e. die) under test 102 including probe head 104, multi layer ceramic (MLC) space transformer 106, printed circuit board sort interface unit 108 with MLC footprint (not shown) and testing apparatus 110. Referring to FIG. 1A, probe head 104 may be a conventional buckling beam floating or non-floating probe head. Referring to FIG. 1B, conventional probe head 104 may be a cantilever beam or membrane type, generally considered more suitable for wire bond type packaging. Probe head 104 (i.e. beam) deflects upon contact with a solder bump on semiconductor die under test 102 by buckling or bending. Since the plurality of pin probes is relatively dense, and is typically connected to a larger pattern compatible with testing apparatus 110, an interconnection device such as a space transformer 106 is generally employed. Space transformer 106 interconnects probe head 104 to printed circuit board sort interface unit 108. Space transformer 106 is interconnected to multi layer printed circuit board 108. Probe head 104 sits below and in contact with the semiconductor die under test 102.
Conventional probe head technology is generally based upon floating or non-floating vertical buckling or cantilever beams employing precision spring action metal pins organized in a precision socket to exactly match the footprint of the die under test. Increasingly, tighter mechanical tolerances, higher pin counts, denser pitches, and ever aggravating need of higher electrical performances at high frequencies and so forth are making conventional probe heads more and more expensive and difficult to fabricate. Membrane type probe heads offer a better alternative than conventional mechanical cantilever beams for horizontal probing applications, but membrane probe heads are typically not suitable for technologies such as micro ball grid array, C4, chip scale or wafer level type packagings that are growing in usage and require vertical probing. Membrane probe head usage is typically limited to conventional wire bond type packaging that is diminishing. Other limitations of membrane probe heads are its inductance/impedance discontinuity and the need for custom fabrication, thus requiring time, money and resources.
With faster edge rates, signal integrity is becoming an important issue in device testing, and conventional methods do not appear promising enough to shrink the inductances and impedance discontinuities. Conventional probe technologies such as buckling beam, cantilever beam, membrane, and so forth tend to attribute to bottlenecks in high speed testing. Conventional probe heads also require an expensive space transformer to maintain local co-planarity. Problems associated with the space transformer include, but are not limited to, costs, lead times, routing densities, scalability, power decoupling and so forth. If the wafer sort is targeted to test multiple dies at a time, the complexity of the problems explodes exponentially, quickly limiting the scope of multiplicity of testing.